abstract base class for usrp operations More...
#include <usrp_basic.h>
Public Member Functions | |
virtual | ~usrp_basic () |
std::vector< std::vector < db_base_sptr > > | db () const |
std::vector< db_base_sptr > | db (int which_side) |
bool | is_valid (const usrp_subdev_spec &ss) |
is the subdev_spec valid? | |
db_base_sptr | selected_subdev (const usrp_subdev_spec &ss) |
given a subdev_spec, return the corresponding daughterboard object. | |
long | fpga_master_clock_freq () const |
return frequency of master oscillator on USRP | |
void | set_fpga_master_clock_freq (long master_clock) |
int | usb_data_rate () const |
void | set_verbose (bool on) |
bool | write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf) |
Write EEPROM on motherboard or any daughterboard. | |
std::string | read_eeprom (int i2c_addr, int eeprom_offset, int len) |
Read EEPROM on motherboard or any daughterboard. | |
bool | write_i2c (int i2c_addr, const std::string buf) |
Write to I2C peripheral. | |
std::string | read_i2c (int i2c_addr, int len) |
Read from I2C peripheral. | |
bool | set_adc_offset (int which_adc, int offset) |
Set ADC offset correction. | |
bool | set_dac_offset (int which_dac, int offset, int offset_pin) |
Set DAC offset correction. | |
bool | set_adc_buffer_bypass (int which_adc, bool bypass) |
Control ADC input buffer. | |
bool | set_dc_offset_cl_enable (int bits, int mask) |
Enable/disable automatic DC offset removal control loop in FPGA. | |
std::string | serial_number () |
return the usrp's serial number. | |
virtual int | daughterboard_id (int which_side) const =0 |
Return daughterboard ID for given side [0,1]. | |
bool | write_atr_tx_delay (int value) |
Clock ticks to delay rising of T/R signal. | |
bool | write_atr_rx_delay (int value) |
Clock ticks to delay falling edge of T/R signal. | |
bool | common_set_pga (txrx_t txrx, int which_amp, double gain_in_db) |
Set Programmable Gain Amplifier(PGA). | |
double | common_pga (txrx_t txrx, int which_amp) const |
Return programmable gain amplifier gain setting in dB. | |
double | common_pga_min (txrx_t txrx) const |
Return minimum legal PGA gain in dB. | |
double | common_pga_max (txrx_t txrx) const |
Return maximum legal PGA gain in dB. | |
double | common_pga_db_per_step (txrx_t txrx) const |
Return hardware step size of PGA(linear in dB). | |
bool | _common_write_oe (txrx_t txrx, int which_side, int value, int mask) |
Write direction register(output enables) for pins that go to daughterboard. | |
bool | common_write_io (txrx_t txrx, int which_side, int value, int mask) |
Write daughterboard i/o pin value. | |
bool | common_read_io (txrx_t txrx, int which_side, int *value) |
Read daughterboard i/o pin value. | |
int | common_read_io (txrx_t txrx, int which_side) |
Read daughterboard i/o pin value. | |
bool | common_write_refclk (txrx_t txrx, int which_side, int value) |
Write daughterboard refclk config register. | |
bool | common_write_atr_mask (txrx_t txrx, int which_side, int value) |
Automatic Transmit/Receive switching. | |
bool | common_write_atr_txval (txrx_t txrx, int which_side, int value) |
bool | common_write_atr_rxval (txrx_t txrx, int which_side, int value) |
bool | common_write_aux_dac (txrx_t txrx, int which_side, int which_dac, int value) |
Write auxiliary digital to analog converter. | |
bool | common_read_aux_adc (txrx_t txrx, int which_side, int which_adc, int *value) |
Read auxiliary analog to digital converter. | |
int | common_read_aux_adc (txrx_t txrx, int which_side, int which_adc) |
Read auxiliary analog to digital converter. | |
virtual bool | set_pga (int which_amp, double gain_in_db)=0 |
Set Programmable Gain Amplifier (PGA). | |
virtual double | pga (int which_amp) const =0 |
Return programmable gain amplifier gain setting in dB. | |
virtual double | pga_min () const =0 |
Return minimum legal PGA gain in dB. | |
virtual double | pga_max () const =0 |
Return maximum legal PGA gain in dB. | |
virtual double | pga_db_per_step () const =0 |
Return hardware step size of PGA (linear in dB). | |
virtual bool | _write_oe (int which_side, int value, int mask)=0 |
Write direction register (output enables) for pins that go to daughterboard. | |
virtual bool | write_io (int which_side, int value, int mask)=0 |
Write daughterboard i/o pin value. | |
virtual bool | read_io (int which_side, int *value)=0 |
Read daughterboard i/o pin value. | |
virtual int | read_io (int which_side)=0 |
Read daughterboard i/o pin value. | |
virtual bool | write_refclk (int which_side, int value)=0 |
Write daughterboard refclk config register. | |
virtual bool | write_atr_mask (int which_side, int value)=0 |
virtual bool | write_atr_txval (int which_side, int value)=0 |
virtual bool | write_atr_rxval (int which_side, int value)=0 |
virtual bool | write_aux_dac (int which_side, int which_dac, int value)=0 |
Write auxiliary digital to analog converter. | |
virtual bool | read_aux_adc (int which_side, int which_adc, int *value)=0 |
Read auxiliary analog to digital converter. | |
virtual int | read_aux_adc (int which_side, int which_adc)=0 |
Read auxiliary analog to digital converter. | |
virtual int | block_size () const =0 |
returns current fusb block size | |
virtual long | converter_rate () const =0 |
returns A/D or D/A converter rate in Hz | |
bool | _set_led (int which_led, bool on) |
bool | _write_fpga_reg (int regno, int value) |
Write FPGA register. | |
bool | _read_fpga_reg (int regno, int *value) |
Read FPGA register. | |
int | _read_fpga_reg (int regno) |
Read FPGA register. | |
bool | _write_fpga_reg_masked (int regno, int value, int mask) |
Write FPGA register with mask. | |
bool | _write_9862 (int which_codec, int regno, unsigned char value) |
Write AD9862 register. | |
bool | _read_9862 (int which_codec, int regno, unsigned char *value) const |
Read AD9862 register. | |
int | _read_9862 (int which_codec, int regno) const |
Read AD9862 register. | |
bool | _write_spi (int optional_header, int enables, int format, std::string buf) |
Write data to SPI bus peripheral. | |
std::string | _read_spi (int optional_header, int enables, int format, int len) |
bool | start () |
Start data transfers. Called in base class to derived class order. | |
bool | stop () |
Stop data transfers. Called in base class to derived class order. | |
Static Public Attributes | |
static const int | READ_FAILED = -99999 |
magic value used on alternate register read interfaces | |
Protected Member Functions | |
void | shutdown_daughterboards () |
void | init_db (usrp_basic_sptr u) |
One time call, made only only from usrp_standard_*make after shared_ptr is created. | |
usrp_basic (int which_board, struct usb_dev_handle *open_interface(struct usb_device *dev), const std::string fpga_filename="", const std::string firmware_filename="") | |
void | set_usb_data_rate (int usb_data_rate) |
advise usrp_basic of usb data rate (bytes/sec) | |
bool | _write_aux_dac (int slot, int which_dac, int value) |
Write auxiliary digital to analog converter. | |
bool | _read_aux_adc (int slot, int which_adc, int *value) |
Read auxiliary analog to digital converter. | |
int | _read_aux_adc (int slot, int which_adc) |
Read auxiliary analog to digital converter. | |
Protected Attributes | |
struct usb_dev_handle * | d_udh |
int | d_usb_data_rate |
int | d_bytes_per_poll |
bool | d_verbose |
long | d_fpga_master_clock_freq |
unsigned int | d_fpga_shadows [MAX_REGS] |
int | d_dbid [2] |
std::vector< std::vector < db_base_sptr > > | d_db |
Static Protected Attributes | |
static const int | MAX_REGS = 128 |
abstract base class for usrp operations
usrp_basic::usrp_basic | ( | int | which_board, | |
struct usb_dev_handle * | open_interfacestruct usb_device *dev, | |||
const std::string | fpga_filename = "" , |
|||
const std::string | firmware_filename = "" | |||
) | [protected] |
bool usrp_basic::_common_write_oe | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value, | |||
int | mask | |||
) |
Write direction register(output enables) for pins that go to daughterboard.
txrx | Tx or Rx? | |
which_side | [0,1] which size | |
value | value to write into register | |
mask | which bits of value to write into reg |
Each d'board has 16-bits of general purpose i/o. Setting the bit makes it an output from the FPGA to the d'board.
This register is initialized based on a value stored in the d'board EEPROM. In general, you shouldn't be using this routine without a very good reason. Using this method incorrectly will kill your USRP motherboard and/or daughterboard.
References _write_fpga_reg().
Referenced by usrp_basic_tx::_write_oe(), usrp_basic_rx::_write_oe(), xcvr2450::set_gpio(), and xcvr2450::xcvr2450().
int usrp_basic::_read_9862 | ( | int | which_codec, | |
int | regno | |||
) | const |
Read AD9862 register.
which_codec | 0 or 1 | |
regno | 6-bit register number |
References _read_9862(), and READ_FAILED.
bool usrp_basic::_read_9862 | ( | int | which_codec, | |
int | regno, | |||
unsigned char * | value | |||
) | const |
Read AD9862 register.
which_codec | 0 or 1 | |
regno | 6-bit register number | |
value | 8-bit value |
References d_udh, and usrp_9862_read().
Referenced by _read_9862(), common_pga(), common_set_pga(), and set_adc_buffer_bypass().
int usrp_basic::_read_aux_adc | ( | int | slot, | |
int | which_adc | |||
) | [protected] |
Read auxiliary analog to digital converter.
slot | 2-bit slot number. E.g., SLOT_TX_A | |
which_adc | [0,1] |
References _read_aux_adc(), and READ_FAILED.
bool usrp_basic::_read_aux_adc | ( | int | slot, | |
int | which_adc, | |||
int * | value | |||
) | [protected] |
Read auxiliary analog to digital converter.
slot | 2-bit slot number. E.g., SLOT_TX_A | |
which_adc | [0,1] | |
value | return 12-bit value [0,4095] |
References d_udh, and usrp_read_aux_adc().
Referenced by _read_aux_adc(), and common_read_aux_adc().
int usrp_basic::_read_fpga_reg | ( | int | regno | ) |
Read FPGA register.
regno | 7-bit register number |
References _read_fpga_reg(), and READ_FAILED.
bool usrp_basic::_read_fpga_reg | ( | int | regno, | |
int * | value | |||
) |
Read FPGA register.
regno | 7-bit register number | |
value | 32-bit value |
References d_udh, and usrp_read_fpga_reg().
Referenced by _read_fpga_reg(), common_read_io(), and usrp_standard_common::usrp_standard_common().
std::string usrp_basic::_read_spi | ( | int | optional_header, | |
int | enables, | |||
int | format, | |||
int | len | |||
) |
References d_udh, and usrp_spi_read().
bool usrp_basic::_set_led | ( | int | which_led, | |
bool | on | |||
) |
References d_udh, and usrp_set_led().
bool usrp_basic::_write_9862 | ( | int | which_codec, | |
int | regno, | |||
unsigned char | value | |||
) |
Write AD9862 register.
which_codec | 0 or 1 | |
regno | 6-bit register number | |
value | 8-bit value |
References d_udh, d_verbose, and usrp_9862_write().
Referenced by common_set_pga(), set_adc_buffer_bypass(), set_dac_offset(), and usrp_standard_tx::set_tx_freq().
bool usrp_basic::_write_aux_dac | ( | int | slot, | |
int | which_dac, | |||
int | value | |||
) | [protected] |
Write auxiliary digital to analog converter.
slot | Which Tx or Rx slot to write. N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. | |
which_dac | [0,3] RX slots must use only 0 and 1. TX slots must use only 2 and 3. | |
value | [0,4095] |
References d_udh, and usrp_write_aux_dac().
Referenced by common_write_aux_dac().
bool usrp_basic::_write_fpga_reg | ( | int | regno, | |
int | value | |||
) |
Write FPGA register.
regno | 7-bit register number | |
value | 32-bit value |
References d_fpga_shadows, d_udh, d_verbose, MAX_REGS, and usrp_write_fpga_reg().
Referenced by _common_write_oe(), common_write_atr_mask(), common_write_atr_rxval(), common_write_atr_txval(), common_write_io(), common_write_refclk(), usrp_basic_rx::probe_rx_slots(), usrp_basic_tx::probe_tx_slots(), set_adc_offset(), set_dc_offset_cl_enable(), usrp_standard_rx::set_ddc_phase(), usrp_standard_rx::set_decim_rate(), usrp_standard_rx::set_format(), usrp_standard_rx::set_fpga_mode(), usrp_basic_rx::set_fpga_rx_sample_rate_divisor(), usrp_basic_tx::set_fpga_tx_sample_rate_divisor(), usrp_standard_tx::set_interp_rate(), usrp_standard_rx::set_rx_freq(), usrp_basic(), write_atr_rx_delay(), write_atr_tx_delay(), usrp_standard_tx::write_hw_mux_reg(), and usrp_standard_rx::write_hw_mux_reg().
bool usrp_basic::_write_fpga_reg_masked | ( | int | regno, | |
int | value, | |||
int | mask | |||
) |
Write FPGA register with mask.
regno | 7-bit register number | |
value | 16-bit value | |
mask | 16-bit value |
References d_fpga_shadows, d_udh, d_verbose, MAX_REGS, and usrp_write_fpga_reg().
virtual bool usrp_basic::_write_oe | ( | int | which_side, | |
int | value, | |||
int | mask | |||
) | [pure virtual] |
Write direction register (output enables) for pins that go to daughterboard.
which_side | [0,1] which size | |
value | value to write into register | |
mask | which bits of value to write into reg |
Each d'board has 16-bits of general purpose i/o. Setting the bit makes it an output from the FPGA to the d'board.
This register is initialized based on a value stored in the d'board EEPROM. In general, you shouldn't be using this routine without a very good reason. Using this method incorrectly will kill your USRP motherboard and/or daughterboard.
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::_enable_refclk(), db_dbs_rx::db_dbs_rx(), flexrf_base::flexrf_base(), flexrf_base_rx::flexrf_base_rx(), and flexrf_base_tx::flexrf_base_tx().
bool usrp_basic::_write_spi | ( | int | optional_header, | |
int | enables, | |||
int | format, | |||
std::string | buf | |||
) |
Write data to SPI bus peripheral.
optional_header | 0,1 or 2 bytes to write before buf. | |
enables | bitmask of peripherals to write. See usrp_spi_defs.h | |
format | transaction format. See usrp_spi_defs.h SPI_FMT_* | |
buf | the data to write |
If format
specifies that optional_header bytes are present, they are written to the peripheral immediately prior to writing buf
.
References d_udh, and usrp_spi_write().
Referenced by flexrf_base::_write_it(), and xcvr2450::send_reg().
virtual int usrp_basic::block_size | ( | ) | const [pure virtual] |
returns current fusb block size
Implemented in usrp_basic_rx, and usrp_basic_tx.
double usrp_basic::common_pga | ( | txrx_t | txrx, | |
int | which_amp | |||
) | const |
Return programmable gain amplifier gain setting in dB.
txrx | Tx or Rx? | |
which_amp | which amp [0,3] |
References _read_9862(), C_TX, pga_db_per_step(), pga_min(), READ_FAILED, REG_RX_A, REG_RX_B, and REG_TX_PGA.
Referenced by usrp_basic_tx::pga(), and usrp_basic_rx::pga().
double usrp_basic::common_pga_db_per_step | ( | txrx_t | txrx | ) | const |
Return hardware step size of PGA(linear in dB).
txrx | Tx or Rx? |
References C_TX.
Referenced by common_set_pga(), usrp_basic_tx::pga_db_per_step(), and usrp_basic_rx::pga_db_per_step().
double usrp_basic::common_pga_max | ( | txrx_t | txrx | ) | const |
Return maximum legal PGA gain in dB.
txrx | Tx or Rx? |
References C_TX.
Referenced by common_set_pga(), usrp_basic_tx::pga_max(), and usrp_basic_rx::pga_max().
double usrp_basic::common_pga_min | ( | txrx_t | txrx | ) | const |
Return minimum legal PGA gain in dB.
txrx | Tx or Rx? |
References C_TX.
Referenced by common_set_pga(), usrp_basic_tx::pga_min(), and usrp_basic_rx::pga_min().
int usrp_basic::common_read_aux_adc | ( | txrx_t | txrx, | |
int | which_side, | |||
int | which_adc | |||
) |
Read auxiliary analog to digital converter.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board | |
which_adc | [0,1] |
References _read_aux_adc().
bool usrp_basic::common_read_aux_adc | ( | txrx_t | txrx, | |
int | which_side, | |||
int | which_adc, | |||
int * | value | |||
) |
Read auxiliary analog to digital converter.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board | |
which_adc | [0,1] | |
value | return 12-bit value [0,4095] |
References _read_aux_adc().
Referenced by usrp_basic_tx::read_aux_adc(), and usrp_basic_rx::read_aux_adc().
int usrp_basic::common_read_io | ( | txrx_t | txrx, | |
int | which_side | |||
) |
Read daughterboard i/o pin value.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board |
References common_read_io(), and READ_FAILED.
bool usrp_basic::common_read_io | ( | txrx_t | txrx, | |
int | which_side, | |||
int * | value | |||
) |
Read daughterboard i/o pin value.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board | |
value | output |
References _read_fpga_reg(), and C_TX.
Referenced by common_read_io(), usrp_basic_tx::read_io(), and usrp_basic_rx::read_io().
bool usrp_basic::common_set_pga | ( | txrx_t | txrx, | |
int | which_amp, | |||
double | gain_in_db | |||
) |
Set Programmable Gain Amplifier(PGA).
txrx | Tx or Rx? | |
which_amp | which amp [0,3] | |
gain_in_db | gain value(linear in dB) |
gain is rounded to closest setting supported by hardware.
References _read_9862(), _write_9862(), C_TX, common_pga_db_per_step(), common_pga_max(), common_pga_min(), REG_RX_A, REG_RX_B, REG_TX_PGA, and RX_X_BYPASS_INPUT_BUFFER.
Referenced by usrp_basic_tx::set_pga(), and usrp_basic_rx::set_pga().
bool usrp_basic::common_write_atr_mask | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value | |||
) |
Automatic Transmit/Receive switching.
If automatic transmit/receive (ATR) switching is enabled in the FR_ATR_CTL register, the presence or absence of data in the FPGA transmit fifo selects between two sets of values for each of the 4 banks of daughterboard i/o pins.
Each daughterboard slot has 3 16-bit registers associated with it: FR_ATR_MASK_*, FR_ATR_TXVAL_* and FR_ATR_RXVAL_*
FR_ATR_MASK_{0,1,2,3}:
These registers determine which of the daugherboard i/o pins are affected by ATR switching. If a bit in the mask is set, the corresponding i/o bit is controlled by ATR, else it's output value comes from the normal i/o pin output register: FR_IO_{0,1,2,3}.
FR_ATR_TXVAL_{0,1,2,3}: FR_ATR_RXVAL_{0,1,2,3}:
If the Tx fifo contains data, then the bits from TXVAL that are selected by MASK are output. Otherwise, the bits from RXVAL that are selected by MASK are output.
References _write_fpga_reg().
Referenced by xcvr2450::set_gpio(), usrp_basic_tx::write_atr_mask(), usrp_basic_rx::write_atr_mask(), and xcvr2450::xcvr2450().
bool usrp_basic::common_write_atr_rxval | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value | |||
) |
References _write_fpga_reg().
Referenced by xcvr2450::set_gpio(), xcvr2450::shutdown(), usrp_basic_tx::write_atr_rxval(), usrp_basic_rx::write_atr_rxval(), and xcvr2450::xcvr2450().
bool usrp_basic::common_write_atr_txval | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value | |||
) |
References _write_fpga_reg().
Referenced by xcvr2450::set_gpio(), xcvr2450::shutdown(), usrp_basic_tx::write_atr_txval(), usrp_basic_rx::write_atr_txval(), and xcvr2450::xcvr2450().
bool usrp_basic::common_write_aux_dac | ( | txrx_t | txrx, | |
int | which_side, | |||
int | which_dac, | |||
int | value | |||
) |
Write auxiliary digital to analog converter.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. | |
which_dac | [2,3] TX slots must use only 2 and 3. | |
value | [0,4095] |
References _write_aux_dac().
Referenced by usrp_basic_tx::write_aux_dac(), and usrp_basic_rx::write_aux_dac().
bool usrp_basic::common_write_io | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value, | |||
int | mask | |||
) |
Write daughterboard i/o pin value.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board | |
value | value to write into register | |
mask | which bits of value to write into reg |
References _write_fpga_reg().
Referenced by xcvr2450::set_gpio(), flexrf_base_rx::shutdown(), usrp_basic_tx::write_io(), usrp_basic_rx::write_io(), and xcvr2450::xcvr2450().
bool usrp_basic::common_write_refclk | ( | txrx_t | txrx, | |
int | which_side, | |||
int | value | |||
) |
Write daughterboard refclk config register.
txrx | Tx or Rx? | |
which_side | [0,1] which d'board | |
value | value to write into register, see below |
Control whether a reference clock is sent to the daughterboards, and what frequency. The refclk is sent on d'board i/o pin 0.
3 2 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +-----------------------------------------------+-+------------+ | Reserved (Must be zero) |E| DIVISOR | +-----------------------------------------------+-+------------+
Bit 7 -- 1 turns on refclk, 0 allows IO use Bits 6:0 Divider value
References _write_fpga_reg().
Referenced by usrp_basic_tx::write_refclk(), and usrp_basic_rx::write_refclk().
virtual long usrp_basic::converter_rate | ( | ) | const [pure virtual] |
returns A/D or D/A converter rate in Hz
Implemented in usrp_basic_rx, and usrp_basic_tx.
virtual int usrp_basic::daughterboard_id | ( | int | which_side | ) | const [pure virtual] |
Return daughterboard ID for given side [0,1].
which_side | [0,1] which daughterboard |
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::dbid().
std::vector< db_base_sptr > usrp_basic::db | ( | int | which_side | ) |
Return a vector of size >= 1 that contains shared pointers to the daughterboard instance(s) associated with the specified side.
which_side | [0,1] which daughterboard |
It is an error to use the returned objects after the usrp_basic object has been destroyed.
References d_db.
std::vector<std::vector<db_base_sptr> > usrp_basic::db | ( | ) | const [inline] |
Return a vector of vectors that contain shared pointers to the daughterboard instance(s) associated with the specified side.
It is an error to use the returned objects after the usrp_basic object has been destroyed.
References d_db.
Referenced by usrp_standard_rx::determine_rx_mux_value(), and usrp_standard_tx::determine_tx_mux_value().
long usrp_basic::fpga_master_clock_freq | ( | ) | const [inline] |
return frequency of master oscillator on USRP
References d_fpga_master_clock_freq.
Referenced by db_base::_refclk_freq(), usrp_basic_tx::converter_rate(), and usrp_basic_rx::converter_rate().
void usrp_basic::init_db | ( | usrp_basic_sptr | u | ) | [protected] |
One time call, made only only from usrp_standard_*make after shared_ptr is created.
References d_db, d_dbid, and instantiate_dbs().
bool usrp_basic::is_valid | ( | const usrp_subdev_spec & | ss | ) |
is the subdev_spec valid?
References d_db, usrp_subdev_spec::side, and usrp_subdev_spec::subdev.
Referenced by usrp_standard_rx::determine_rx_mux_value(), usrp_standard_tx::determine_tx_mux_value(), and selected_subdev().
virtual double usrp_basic::pga | ( | int | which_amp | ) | const [pure virtual] |
Return programmable gain amplifier gain setting in dB.
which_amp | which amp [0,3] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
virtual double usrp_basic::pga_db_per_step | ( | ) | const [pure virtual] |
Return hardware step size of PGA (linear in dB).
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by common_pga(), db_basic_rx::gain_db_per_step(), and db_basic_tx::gain_db_per_step().
virtual double usrp_basic::pga_max | ( | ) | const [pure virtual] |
Return maximum legal PGA gain in dB.
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_flexrf_400_rx::gain_max(), db_flexrf_900_rx::gain_max(), db_flexrf_1800_rx::gain_max(), db_flexrf_1200_rx::gain_max(), db_flexrf_2400_rx::gain_max(), flexrf_base_tx::gain_max(), db_basic_rx::gain_max(), db_basic_tx::gain_max(), flexrf_base_tx::gain_min(), and flexrf_base_rx::set_gain().
virtual double usrp_basic::pga_min | ( | ) | const [pure virtual] |
Return minimum legal PGA gain in dB.
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by common_pga(), db_flexrf_400_rx::gain_min(), db_flexrf_900_rx::gain_min(), db_flexrf_1800_rx::gain_min(), db_flexrf_1200_rx::gain_min(), db_flexrf_2400_rx::gain_min(), db_basic_rx::gain_min(), and db_basic_tx::gain_min().
virtual int usrp_basic::read_aux_adc | ( | int | which_side, | |
int | which_adc | |||
) | [pure virtual] |
Read auxiliary analog to digital converter.
which_side | [0,1] which d'board | |
which_adc | [0,1] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
virtual bool usrp_basic::read_aux_adc | ( | int | which_side, | |
int | which_adc, | |||
int * | value | |||
) | [pure virtual] |
Read auxiliary analog to digital converter.
which_side | [0,1] which d'board | |
which_adc | [0,1] | |
value | return 12-bit value [0,4095] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
std::string usrp_basic::read_eeprom | ( | int | i2c_addr, | |
int | eeprom_offset, | |||
int | len | |||
) |
Read EEPROM on motherboard or any daughterboard.
i2c_addr | I2C bus address of EEPROM | |
eeprom_offset | byte offset in EEPROM to begin reading | |
len | number of bytes to read |
References d_udh, and usrp_eeprom_read().
std::string usrp_basic::read_i2c | ( | int | i2c_addr, | |
int | len | |||
) |
Read from I2C peripheral.
i2c_addr | I2C bus address (7-bits) | |
len | number of bytes to read |
References d_udh, and usrp_i2c_read().
virtual int usrp_basic::read_io | ( | int | which_side | ) | [pure virtual] |
Read daughterboard i/o pin value.
which_side | [0,1] which d'board |
Implemented in usrp_basic_rx, and usrp_basic_tx.
virtual bool usrp_basic::read_io | ( | int | which_side, | |
int * | value | |||
) | [pure virtual] |
Read daughterboard i/o pin value.
which_side | [0,1] which d'board | |
value | output |
Implemented in usrp_basic_rx, and usrp_basic_tx.
db_base_sptr usrp_basic::selected_subdev | ( | const usrp_subdev_spec & | ss | ) |
given a subdev_spec, return the corresponding daughterboard object.
std::invalid_ | argument if ss is invalid. |
ss | specifies the side and subdevice |
References d_db, is_valid(), usrp_subdev_spec::side, and usrp_subdev_spec::subdev.
std::string usrp_basic::serial_number | ( | ) |
return the usrp's serial number.
References d_udh, and usrp_serial_number().
bool usrp_basic::set_adc_buffer_bypass | ( | int | which_adc, | |
bool | bypass | |||
) |
Control ADC input buffer.
which_adc | which ADC[0,3] | |
bypass | if non-zero, bypass input buffer and connect input directly to switched cap SHA input of RxPGA. |
References _read_9862(), _write_9862(), REG_RX_A, REG_RX_B, REG_RX_PWR_DN, RX_PWR_DN_BUF_A, RX_PWR_DN_BUF_B, and RX_X_BYPASS_INPUT_BUFFER.
Referenced by db_base::bypass_adc_buffers().
bool usrp_basic::set_adc_offset | ( | int | which_adc, | |
int | offset | |||
) |
Set ADC offset correction.
which_adc | which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q... | |
offset | 16-bit value to subtract from raw ADC input. |
References _write_fpga_reg().
Referenced by usrp_basic_rx::probe_rx_slots().
bool usrp_basic::set_dac_offset | ( | int | which_dac, | |
int | offset, | |||
int | offset_pin | |||
) |
Set DAC offset correction.
which_dac | which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q... | |
offset | 10-bit offset value (ambiguous format: See AD9862 datasheet). | |
offset_pin | 1-bit value. If 0 offset applied to -ve differential pin; If 1 offset applied to +ve differential pin. |
References _write_9862(), REG_TX_A_OFFSET_HI, REG_TX_A_OFFSET_LO, REG_TX_B_OFFSET_HI, and REG_TX_B_OFFSET_LO.
bool usrp_basic::set_dc_offset_cl_enable | ( | int | bits, | |
int | mask | |||
) |
Enable/disable automatic DC offset removal control loop in FPGA.
bits | which control loops to enable | |
mask | which bits to pay attention to |
If the corresponding bit is set, enable the automatic DC offset correction control loop.
The 4 low bits are significant:
ADC0 = (1 << 0) ADC1 = (1 << 1) ADC2 = (1 << 2) ADC3 = (1 << 3)
By default the control loop is enabled on all ADC's.
References _write_fpga_reg(), and d_fpga_shadows.
Referenced by usrp_basic_rx::usrp_basic_rx().
void usrp_basic::set_fpga_master_clock_freq | ( | long | master_clock | ) | [inline] |
Tell API that the master oscillator on the USRP is operating at a non-standard fixed frequency. This is only needed for custom USRP hardware modified to operate at a different frequency from the default factory configuration. This function must be called prior to any other API function.
master_clock | USRP2 FPGA master clock frequency in Hz (10..64 MHz) |
References d_fpga_master_clock_freq.
virtual bool usrp_basic::set_pga | ( | int | which_amp, | |
double | gain_in_db | |||
) | [pure virtual] |
Set Programmable Gain Amplifier (PGA).
which_amp | which amp [0,3] | |
gain_in_db | gain value (linear in dB) |
gain is rounded to closest setting supported by hardware.
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by flexrf_base::_set_pga(), db_basic_rx::set_gain(), and db_basic_tx::set_gain().
void usrp_basic::set_usb_data_rate | ( | int | usb_data_rate | ) | [protected] |
advise usrp_basic of usb data rate (bytes/sec)
N.B., this doesn't tweak any hardware. Derived classes should call this to inform us of the data rate whenever it's first set or if it changes.
usb_data_rate | bytes/sec |
References d_bytes_per_poll, and d_usb_data_rate.
Referenced by usrp_standard_rx::set_decim_rate(), and usrp_standard_tx::set_interp_rate().
void usrp_basic::set_verbose | ( | bool | on | ) | [inline] |
References d_verbose.
void usrp_basic::shutdown_daughterboards | ( | ) | [protected] |
References d_db.
Referenced by usrp_basic_rx::~usrp_basic_rx(), and usrp_basic_tx::~usrp_basic_tx().
bool usrp_basic::start | ( | ) |
Start data transfers. Called in base class to derived class order.
Reimplemented in usrp_basic_rx, usrp_basic_tx, usrp_standard_rx, and usrp_standard_tx.
Referenced by usrp_basic_tx::start(), and usrp_basic_rx::start().
bool usrp_basic::stop | ( | ) |
Stop data transfers. Called in base class to derived class order.
Reimplemented in usrp_basic_rx, usrp_basic_tx, usrp_standard_rx, and usrp_standard_tx.
int usrp_basic::usb_data_rate | ( | ) | const [inline] |
References d_usb_data_rate.
virtual bool usrp_basic::write_atr_mask | ( | int | which_side, | |
int | value | |||
) | [pure virtual] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::set_atr_mask().
bool usrp_basic::write_atr_rx_delay | ( | int | value | ) |
Clock ticks to delay falling edge of T/R signal.
References _write_fpga_reg().
Referenced by db_base::set_atr_rx_delay().
virtual bool usrp_basic::write_atr_rxval | ( | int | which_side, | |
int | value | |||
) | [pure virtual] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::set_atr_rxval().
bool usrp_basic::write_atr_tx_delay | ( | int | value | ) |
Clock ticks to delay rising of T/R signal.
References _write_fpga_reg().
Referenced by db_base::set_atr_tx_delay().
virtual bool usrp_basic::write_atr_txval | ( | int | which_side, | |
int | value | |||
) | [pure virtual] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::set_atr_txval().
virtual bool usrp_basic::write_aux_dac | ( | int | which_side, | |
int | which_dac, | |||
int | value | |||
) | [pure virtual] |
Write auxiliary digital to analog converter.
which_side | [0,1] which d'board N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's. | |
which_dac | [2,3] TX slots must use only 2 and 3. | |
value | [0,4095] |
Implemented in usrp_basic_rx, and usrp_basic_tx.
bool usrp_basic::write_eeprom | ( | int | i2c_addr, | |
int | eeprom_offset, | |||
const std::string | buf | |||
) |
Write EEPROM on motherboard or any daughterboard.
i2c_addr | I2C bus address of EEPROM | |
eeprom_offset | byte offset in EEPROM to begin writing | |
buf | the data to write |
References d_udh, and usrp_eeprom_write().
bool usrp_basic::write_i2c | ( | int | i2c_addr, | |
const std::string | buf | |||
) |
Write to I2C peripheral.
i2c_addr | I2C bus address (7-bits) | |
buf | the data to write |
References d_udh, and usrp_i2c_write().
virtual bool usrp_basic::write_io | ( | int | which_side, | |
int | value, | |||
int | mask | |||
) | [pure virtual] |
Write daughterboard i/o pin value.
which_side | [0,1] which d'board | |
value | value to write into register | |
mask | which bits of value to write into reg |
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by flexrf_base_rx::flexrf_base_rx(), flexrf_base_tx::flexrf_base_tx(), flexrf_base_rx::select_rx_antenna(), flexrf_base_tx::set_enable(), and flexrf_base_tx::shutdown().
virtual bool usrp_basic::write_refclk | ( | int | which_side, | |
int | value | |||
) | [pure virtual] |
Write daughterboard refclk config register.
which_side | [0,1] which d'board | |
value | value to write into register, see below |
Control whether a reference clock is sent to the daughterboards, and what frequency. The refclk is sent on d'board i/o pin 0.
3 2 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +-----------------------------------------------+-+------------+ | Reserved (Must be zero) |E| DIVISOR | +-----------------------------------------------+-+------------+
Bit 7 -- 1 turns on refclk, 0 allows IO use Bits 6:0 Divider value
Implemented in usrp_basic_rx, and usrp_basic_tx.
Referenced by db_base::_enable_refclk().
int usrp_basic::d_bytes_per_poll [protected] |
Referenced by usrp_basic_rx::read(), set_usb_data_rate(), and usrp_basic_tx::write().
std::vector< std::vector<db_base_sptr> > usrp_basic::d_db [protected] |
Shared pointers to subclasses of db_base.
The outer vector is of length 2 (0 = side A, 1 = side B). The inner vectors are of length 1, 2 or 3 depending on the number of subdevices implemented by the daugherboard. At this time, only the Basic Rx and LF Rx implement more than 1 subdevice.
Referenced by db(), init_db(), is_valid(), selected_subdev(), shutdown_daughterboards(), and ~usrp_basic().
int usrp_basic::d_dbid[2] [protected] |
long usrp_basic::d_fpga_master_clock_freq [protected] |
Referenced by fpga_master_clock_freq(), and set_fpga_master_clock_freq().
unsigned int usrp_basic::d_fpga_shadows[MAX_REGS] [protected] |
Referenced by _write_fpga_reg(), _write_fpga_reg_masked(), usrp_standard_rx::format(), set_dc_offset_cl_enable(), and usrp_basic().
struct usb_dev_handle* usrp_basic::d_udh [protected] |
Referenced by _read_9862(), _read_aux_adc(), _read_fpga_reg(), _read_spi(), _set_led(), _write_9862(), _write_aux_dac(), _write_fpga_reg(), _write_fpga_reg_masked(), _write_spi(), usrp_basic_rx::probe_rx_slots(), usrp_basic_tx::probe_tx_slots(), usrp_basic_rx::read(), read_eeprom(), read_i2c(), serial_number(), usrp_basic_rx::set_rx_enable(), usrp_basic_tx::set_tx_enable(), usrp_basic(), usrp_basic_rx::usrp_basic_rx(), usrp_basic_tx::usrp_basic_tx(), usrp_standard_tx::usrp_standard_tx(), usrp_basic_tx::write(), write_eeprom(), write_i2c(), ~usrp_basic(), usrp_basic_rx::~usrp_basic_rx(), and usrp_basic_tx::~usrp_basic_tx().
int usrp_basic::d_usb_data_rate [protected] |
Referenced by set_usb_data_rate(), and usb_data_rate().
bool usrp_basic::d_verbose [protected] |
const int usrp_basic::MAX_REGS = 128 [static, protected] |
Referenced by _write_fpga_reg(), and _write_fpga_reg_masked().
const int usrp_basic::READ_FAILED = -99999 [static] |
magic value used on alternate register read interfaces
Referenced by _read_9862(), _read_aux_adc(), _read_fpga_reg(), common_pga(), and common_read_io().