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Makefiles contain five kinds of things: explicit rules,
implicit rules, variable definitions, directives,
and comments. Rules, variables, and directives are described at
length in later chapters.
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An explicit rule says when and how to remake one or more files,
called the rule's targets. It lists the other files that the targets
depend on, call the prerequisites of the target, and may also give
commands to use to create or update the targets. See section Writing Rules.
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An implicit rule says when and how to remake a class of files
based on their names. It describes how a target may depend on a file
with a name similar to the target and gives commands to create or
update such a target. See section Using Implicit Rules.
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A variable definition is a line that specifies a text string
value for a variable that can be substituted into the text later. The
simple makefile example shows a variable definition for
objects
as a list of all object files (see section Variables Make Makefiles Simpler).
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A directive is a command for
make to do something special while
reading the makefile. These include:
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`#' in a line of a makefile starts a comment. It and the rest of
the line are ignored, except that a trailing backslash not escaped by
another backslash will continue the comment across multiple lines.
Comments may appear on any of the lines in the makefile, except within a
define directive, and perhaps within commands (where the shell
decides what is a comment). A line containing just a comment (with
perhaps spaces before it) is effectively blank, and is ignored.
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